Design Integration Engineer

HCLTech • Cambridge, Cambridgeshire, UK • 16h ago

Role: Design Integration

Job Description

Create design integration doc/micro-architecture doc for IP/Sub-system/SoC top
IP evaluation, IP Generation, IP wrapper logic coding
SoC top integration – SS integration, IO ring, System controller
UPF coding
RTL quality checks – Lint, CDC/RDC, DFT, UPF lint checks
SDC constraints development
FEBE – trial synthesis, LEC etc.
Interaction with PD, DFT, Emulation/Proto teams

Required Skills / Experience

Candidate must have minimum 4 years of experience in VLSI design
Candidate must have strong knowledge of System Verilog for RTL design

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